22 #ifndef AVCODEC_AVR32_MATHOPS_H
23 #define AVCODEC_AVR32_MATHOPS_H
34 union {
int64_t x;
int hl[2]; } x;
35 __asm__ (
"muls.d %0, %1, %2 \n\t"
37 "or %0, %0, %m0<<%4 \n\t"
45 union {
int64_t x;
int hl[2]; } x;
46 __asm__ (
"muls.d %0, %1, %2" :
"=r"(x.x) :
"r"(
a),
"r"(
b));
54 __asm__ (
"muls.d %0, %1, %2" :
"=r"(x) :
"r"(
a),
"r"(
b));
60 __asm__ (
"macs.d %0, %1, %2" :
"+r"(d) :
"r"(
a),
"r"(
b));
63 #define MAC64(d, a, b) ((d) = MAC64(d, a, b))
64 #define MLS64(d, a, b) MAC64(d, -(a), b)
68 __asm__ (
"machh.w %0, %1:b, %2:b" :
"+r"(d) :
"r"(
a),
"r"(
b));
71 #define MAC16(d, a, b) ((d) = MAC16(d, a, b))
72 #define MLS16(d, a, b) MAC16(d, -(a), b)
78 __asm__ (
"mulhh.w %0, %1:b, %2:b" :
"=r"(d) :
"r"(
a),
"r"(
b));
82 #define mid_pred mid_pred
__asm__(".macro parse_r var r\n\t" "\\var = -1\n\t" _IFC_REG(0) _IFC_REG(1) _IFC_REG(2) _IFC_REG(3) _IFC_REG(4) _IFC_REG(5) _IFC_REG(6) _IFC_REG(7) _IFC_REG(8) _IFC_REG(9) _IFC_REG(10) _IFC_REG(11) _IFC_REG(12) _IFC_REG(13) _IFC_REG(14) _IFC_REG(15) _IFC_REG(16) _IFC_REG(17) _IFC_REG(18) _IFC_REG(19) _IFC_REG(20) _IFC_REG(21) _IFC_REG(22) _IFC_REG(23) _IFC_REG(24) _IFC_REG(25) _IFC_REG(26) _IFC_REG(27) _IFC_REG(28) _IFC_REG(29) _IFC_REG(30) _IFC_REG(31) ".iflt \\var\n\t" ".error \"Unable to parse register name \\r\"\n\t" ".endif\n\t" ".endm")
common internal and external API header
#define MAC16(rt, ra, rb)
static int shift(int a, int b)