23 #include "../lossless_videodsp.h"
32 int *left,
int *left_top);
35 int *left,
int *left_top);
38 ptrdiff_t
w,
int left);
40 ptrdiff_t
w,
int left);
42 ptrdiff_t
w,
int left);
50 #if HAVE_INLINE_ASM && HAVE_7REGS && ARCH_X86_32
53 int *left,
int *left_top)
58 int tl = *left_top & 0xff;
63 "movzbl (%3, %4), %2 \n"
76 "add (%6, %4), %b0 \n"
77 "mov %b0, (%5, %4) \n"
80 :
"+&q"(l),
"+&q"(tl),
"=&r"(t),
"=&q"(x),
"+&r"(w2)
81 :
"r"(dst +
w),
"r"(
diff +
w),
"rm"(top +
w)
92 #if HAVE_INLINE_ASM && HAVE_7REGS && ARCH_X86_32
94 c->add_median_pred = add_median_pred_cmov;
__asm__(".macro parse_r var r\n\t" "\\var = -1\n\t" _IFC_REG(0) _IFC_REG(1) _IFC_REG(2) _IFC_REG(3) _IFC_REG(4) _IFC_REG(5) _IFC_REG(6) _IFC_REG(7) _IFC_REG(8) _IFC_REG(9) _IFC_REG(10) _IFC_REG(11) _IFC_REG(12) _IFC_REG(13) _IFC_REG(14) _IFC_REG(15) _IFC_REG(16) _IFC_REG(17) _IFC_REG(18) _IFC_REG(19) _IFC_REG(20) _IFC_REG(21) _IFC_REG(22) _IFC_REG(23) _IFC_REG(24) _IFC_REG(25) _IFC_REG(26) _IFC_REG(27) _IFC_REG(28) _IFC_REG(29) _IFC_REG(30) _IFC_REG(31) ".iflt \\var\n\t" ".error \"Unable to parse register name \\r\"\n\t" ".endif\n\t" ".endm")
static atomic_int cpu_flags
int av_get_cpu_flags(void)
Return the flags which specify extensions supported by the CPU.
#define AV_CPU_FLAG_CMOV
supports cmov instruction
#define AV_CPU_FLAG_3DNOW
AMD 3DNOW.
void ff_add_gradient_pred_avx2(uint8_t *src, const ptrdiff_t stride, const ptrdiff_t width)
int ff_add_left_pred_unaligned_avx2(uint8_t *dst, const uint8_t *src, ptrdiff_t w, int left)
void ff_add_bytes_sse2(uint8_t *dst, uint8_t *src, ptrdiff_t w)
void ff_llviddsp_init_x86(LLVidDSPContext *c)
void ff_add_median_pred_mmxext(uint8_t *dst, const uint8_t *top, const uint8_t *diff, ptrdiff_t w, int *left, int *left_top)
void ff_add_gradient_pred_ssse3(uint8_t *src, const ptrdiff_t stride, const ptrdiff_t width)
void ff_add_median_pred_sse2(uint8_t *dst, const uint8_t *top, const uint8_t *diff, ptrdiff_t w, int *left, int *left_top)
int ff_add_left_pred_unaligned_ssse3(uint8_t *dst, const uint8_t *src, ptrdiff_t w, int left)
int ff_add_left_pred_int16_unaligned_ssse3(uint16_t *dst, const uint16_t *src, unsigned mask, ptrdiff_t w, unsigned acc)
void ff_add_bytes_mmx(uint8_t *dst, uint8_t *src, ptrdiff_t w)
int ff_add_left_pred_int16_ssse3(uint16_t *dst, const uint16_t *src, unsigned mask, ptrdiff_t w, unsigned acc)
void ff_add_bytes_avx2(uint8_t *dst, uint8_t *src, ptrdiff_t w)
int ff_add_left_pred_ssse3(uint8_t *dst, const uint8_t *src, ptrdiff_t w, int left)
static const uint16_t mask[17]
static av_always_inline int diff(const uint32_t a, const uint32_t b)
#define EXTERNAL_AVX2_FAST(flags)
#define EXTERNAL_MMXEXT(flags)
#define EXTERNAL_SSSE3(flags)
#define EXTERNAL_MMX(flags)
#define EXTERNAL_SSSE3_FAST(flags)
#define EXTERNAL_SSE2(flags)